A thin film transistor (TFT) array substrate includes a TFT including an active layer, a gate electrode, source and drain electrodes, a first insulating layer between the active layer and the gate electrode, and a second insulating layer and a third insulating layer between the gate electrode and the source and drain electrodes, the first insulating layer and the second insulating layer extending in the TFT, a pixel electrode including a transparent conductive oxide material, the pixel electrode being on the first insulating layer and the second insulating layer and being connected to the source or drain electrodes via an opening in the third insulating layer, a capacitor including a first electrode on a same layer as the gate electrode and a second electrode on a same layer as the pixel electrode; and a fourth insulating layer covering the source and drain electrodes and exposing the pixel electrode via an opening.