A voltage regulator includes a power device formed by an NMOS transistor having a drain terminal coupled to an input voltage, a source terminal providing an output voltage and a gate terminal receiving a gate drive signal; and an integrated AC/DC control loop configured to access the output voltage and to generate the gate drive signal based on a value of the output voltage in relation to a first reference voltage and a second reference voltage. The AC control portion generates a gate drive control signal which is AC coupled to the gate terminal of the power device as an AC component of the gate drive signal. The DC control portion controls a DC voltage level of the gate drive signal. The AC control portion is powered by the input voltage while the DC control portion is powered by a high supply voltage greater than the input voltage.