A fabricating process for a multi-layer printed circuit board containing embedded passive components is provided. The method includes a calibration step wherein a calibration measurement is taken of the geometry or at least one electrical parameter of an arrangement of calibration test points for a circuit forming process, such as masking, etching and/or lamination. A process control step is performed during the process, wherein a process control measurement is taken of at least one electrical parameter at one or more process control test points along one or more axes outside areas in which a circuit is to be formed. An analysis is performed of at least the calibration measurement and the process control measurement to calculate a CAD geometry change required to improve precision of embedded passive components to be printed on the multi-layer printed circuit board. The CAD geometry is modified in accordance with the calculated CAD geometry change, and multi-layer printed circuit boards containing embedded passive components are manufactured in accordance with the modified CAD geometry. The analyzing step may model variability and adapt to it.