Invention Grant
- Patent Title: Methods of fabricating semiconductor structures or devices using layers of semiconductor material having selected or controlled lattice parameters
- Patent Title (中): 使用具有选定或控制的晶格参数的半导体材料层制造半导体结构或器件的方法
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Application No.: US13060398Application Date: 2009-07-23
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Publication No.: US08765508B2Publication Date: 2014-07-01
- Inventor: Chantal Arena
- Applicant: Chantal Arena
- Applicant Address: FR Bernin
- Assignee: Soitec
- Current Assignee: Soitec
- Current Assignee Address: FR Bernin
- Agency: TraskBritt
- International Application: PCT/US2009/051505 WO 20090723
- International Announcement: WO2010/024987 WO 20100304
- Main IPC: H01L29/20
- IPC: H01L29/20

Abstract:
Methods of fabricating semiconductor devices or structures include bonding a layer of semiconductor material to another material at a temperature, and subsequently changing the temperature of the layer of semiconductor material. The another material may be selected to exhibit a coefficient of thermal expansion such that, as the temperature of the layer of semiconductor material is changed, a controlled and/or selected lattice parameter is imparted to or retained in the layer of semiconductor material. In some embodiments, the layer of semiconductor material may comprise a III-V type semiconductor material, such as, for example, indium gallium nitride. Novel intermediate structures are formed during such methods. Engineered substrates include a layer of semiconductor material having an average lattice parameter at room temperature proximate an average lattice parameter of the layer of semiconductor material previously attained at an elevated temperature.
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