Deposit/etch for tapered oxide

Invention Grant

US08765609B2 Deposit/etch for tapered oxide 有权

Title translation: 沉积/蚀刻锥形氧化物

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Patent Title: Deposit/etch for tapered oxide
Patent Title (中): 沉积/蚀刻锥形氧化物
Application No.: US13558218

Application Date: 2012-07-25
Publication No.: US08765609B2

Publication Date: 2014-07-01
Inventor: Vijay Parthasarathy , Sujit Banerjee , Wayne B. Grabowski
Applicant: Vijay Parthasarathy , Sujit Banerjee , Wayne B. Grabowski
Applicant Address: US CA San Jose
Assignee: Power Integrations, Inc.
Current Assignee: Power Integrations, Inc.
Current Assignee Address: US CA San Jose
Agency: Morrison & Foerster LLP
Main IPC: H01L21/311
IPC: H01L21/311

Abstract:

A process for fabricating a tapered field plate dielectric for high-voltage semiconductor devices is disclosed. The process may include depositing a thin layer of oxide, depositing a polysilicon hard mask, depositing a resist layer and etching a trench area, performing deep silicon trench etch, and stripping the resist layer. The process may further include repeated steps of depositing a layer of oxide and anisotropic etching of the oxide to form a tapered wall within the trench. The process may further include depositing poly and performing further processing to form the semiconductor device.

Abstract(Chinese):

公开了一种用于制造用于高压半导体器件的锥形场板电介质的工艺。该方法可以包括沉积氧化物薄层，沉积多晶硅硬掩模，沉积抗蚀剂层和蚀刻沟槽区域，执行深硅沟槽蚀刻和剥离抗蚀剂层。该方法还可以包括沉积氧化物层和各向异性蚀刻氧化物以在沟槽内形成锥形壁的重复步骤。该方法还可以包括沉积多晶硅并执行进一步的处理以形成半导体器件。

Public/Granted literature

US20140030868A1 DEPOSIT/ETCH FOR TAPERED OXIDE Public/Granted day:2014-01-30

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/30	....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/28）
H01L21/31	.....在半导体材料上形成绝缘层的，例如用于掩膜的或应用光刻技术的（密封层入H01L21/56）；以及这些层的后处理；这些层的材料的选择
H01L21/3105	......后处理
H01L21/311	.......绝缘层的刻蚀