Invention Grant
- Patent Title: Integrated circuit with self-aligned line and via
- Patent Title (中): 具有自对准线和通孔的集成电路
-
Application No.: US11466018Application Date: 2006-08-21
-
Publication No.: US08766454B2Publication Date: 2014-07-01
- Inventor: Yeow Kheng Lim , Randall Cher Liang Cha , Alex See , Wang Ling Goh
- Applicant: Yeow Kheng Lim , Randall Cher Liang Cha , Alex See , Wang Ling Goh
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768 ; H01L23/522

Abstract:
An integrated circuit is provided having a base with a first dielectric layer formed thereon. A second dielectric layer is formed over the first dielectric layer. A third dielectric layer is formed in spaced-apart strips over the second dielectric layer. A first trench opening is formed through the first and second dielectric layers between the spaced-apart strips of the third dielectric layer. A second trench opening is formed contiguously with the first trench opening through the first dielectric layer between the spaced-apart strips of the third dielectric layer. Conductor metals in the trench openings form self-aligned trench interconnects.
Public/Granted literature
- US20070075371A1 INTEGRATED CIRCUIT WITH SELF-ALIGNED LINE AND VIA Public/Granted day:2007-04-05
Information query
IPC分类: