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US08766689B2 Phase-frequency detection method 有权
相频检测方法

Phase-frequency detection method
Abstract:
The present invention relates to a method and device for phase-frequency detection in a phase-lock loop circuit. The method comprises receiving compare edge of a reference clock signal and compare edge of a feedback clock signal, maintaining a phase/frequency detector, PFD, state machine with three PFD states, UP, DOWN, and IDLE, based on the received compare edges of the reference and feedback clock signals, recording current and previous time the state machine stays in UP or DOWN states, generating an UP or DOWN signal based on transition of PFD states and the comparison between recorded current time and recorded previous time; and outputting a digital control signal to a feedback frequency control device based on the UP or DOWN signal. A device and system is arranged to execute the method according to the present invention.
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