A nonvolatile semiconductor memory device comprises a memory cell array, a control circuit, a current limiting circuit and a current suppression circuit. The memory cell array has a first line, a second line, and a memory cell arranged therein, the memory cell being connected between the first line and the second line and including a variable resistance element. The control circuit is configured to apply, via the first line and the second line, a voltage required in operation of the memory cell. The current limiting circuit is connected to the first line and configured to limit a current flowing in the memory cell to a certain limit value. The current suppression circuit is configured connectable to the second line and configured to suppress a current flowing in the second line according to a kind of operation on the memory cell.