Invention Grant
US08769355B2 Using built-in self test for preventing side channel security attacks on multi-processor systems
有权
使用内置的自检来防止多处理器系统的侧面通道安全攻击
- Patent Title: Using built-in self test for preventing side channel security attacks on multi-processor systems
- Patent Title (中): 使用内置的自检来防止多处理器系统的侧面通道安全攻击
-
Application No.: US13169664Application Date: 2011-06-27
-
Publication No.: US08769355B2Publication Date: 2014-07-01
- Inventor: Jeffrey W. Scott , William C. Moyer
- Applicant: Jeffrey W. Scott , William C. Moyer
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: G11C29/00
- IPC: G11C29/00

Abstract:
A data processing system having a first processor, a second processor, a local memory of the second processor, and a built-in self-test (BIST) controller of the second processor which performs BIST memory accesses on the local memory of the second processor and which includes a random value generator is provided. The system can perform a method including executing a secure code sequence by the first processor and performing, by the BIST controller of the second processor, BIST memory accesses to the local memory of the second processor in response to the random value generator. Performing the BIST memory accesses is performed concurrently with executing the secure code sequence.
Public/Granted literature
- US20120331309A1 USING BUILT-IN SELF TEST FOR PREVENTING SIDE CHANNEL SECURITY ATTACKS ON MULTI-PROCESSOR SYSTEMS Public/Granted day:2012-12-27
Information query