Invention Grant
- Patent Title: MOSFET including asymmetric source and drain regions
- Patent Title (中): MOSFET包括不对称的源极和漏极区域
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Application No.: US13216554Application Date: 2011-08-24
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Publication No.: US08772874B2Publication Date: 2014-07-08
- Inventor: Kangguo Cheng , Balasubramanian S. Haran , Shom Ponoth , Theodorus E. Standaert , Tenko Yamashita
- Applicant: Kangguo Cheng , Balasubramanian S. Haran , Shom Ponoth , Theodorus E. Standaert , Tenko Yamashita
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Joseph Petrokaitis, Esq.
- Main IPC: H01L27/01
- IPC: H01L27/01 ; H01L27/12 ; H01L31/0392

Abstract:
At least one drain-side surfaces of a field effect transistor (FET) structure, which can be a structure for a planar FET or a fin FET, is structurally damaged by an angled ion implantation of inert or electrically active dopants, while at least one source-side surface of the transistor is protected from implantation by a gate stack and a gate spacer. Epitaxial growth of a semiconductor material is retarded on the at least one structurally damaged drain-side surface, while epitaxial growth proceeds without retardation on the at least one source-side surface. A raised epitaxial source region has a greater thickness than a raised epitaxial drain region, thereby providing an asymmetric FET having lesser source-side external resistance than drain-side external resistance, and having lesser drain-side overlap capacitance than source-side overlap capacitance.
Public/Granted literature
- US20130049115A1 MOSFET INCLUDING ASYMMETRIC SOURCE AND DRAIN REGIONS Public/Granted day:2013-02-28
Information query
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