Invention Grant
US08772905B2 Integration of resistors and capacitors in charge trap memory device fabrication
有权
在电荷陷阱存储器件制造中集成电阻和电容器
- Patent Title: Integration of resistors and capacitors in charge trap memory device fabrication
- Patent Title (中): 在电荷陷阱存储器件制造中集成电阻和电容器
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Application No.: US13132312Application Date: 2008-12-30
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Publication No.: US08772905B2Publication Date: 2014-07-08
- Inventor: Umberto M. Meotto , Paolo Tessariol
- Applicant: Umberto M. Meotto , Paolo Tessariol
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman, Lundberg & Woessner, P.A.
- International Application: PCT/IT2008/000812 WO 20081230
- International Announcement: WO2010/076824 WO 20100708
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
A semiconductor device structure and method to form the same. The semiconductor device structure includes a non-volatile charge trap memory device and a resistor or capacitor. A dielectric layer of a charge trap dielectric stack of the memory device is patterned to expose a portion of a first conductive layer peripheral to the memory device. A second conductive layer formed over the dielectric layer and on the exposed portion of the first conductive layer is patterned to form resistor or capacitor contacts and capacitor plates.
Public/Granted literature
- US20110248333A1 INTEGRATION OF RESISTORS AND CAPACITORS IN CHARGE TRAP MEMORY DEVICE FABRICATION Public/Granted day:2011-10-13
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