Invention Grant
US08773099B2 Methods to reduce output voltage ripple in constant on-time DC-DC converters
有权
降低恒定导通时间DC-DC转换器输出电压纹波的方法
- Patent Title: Methods to reduce output voltage ripple in constant on-time DC-DC converters
- Patent Title (中): 降低恒定导通时间DC-DC转换器输出电压纹波的方法
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Application No.: US13197326Application Date: 2011-08-03
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Publication No.: US08773099B2Publication Date: 2014-07-08
- Inventor: Steven M. Granger
- Applicant: Steven M. Granger
- Applicant Address: US NC Morrisville
- Assignee: Semtech Corporation
- Current Assignee: Semtech Corporation
- Current Assignee Address: US NC Morrisville
- Agency: Coats and Bennett, P.L.L.C.
- Main IPC: H02M3/156
- IPC: H02M3/156

Abstract:
According to one aspect of the teachings herein, a DC-to-DC converter operates according to an advantageous constant on-time topology that reduces output voltage ripple during light load conditions. The converter produces an output voltage by driving high-side and low-side switches in an inductor-based switching circuit, and regulates the output voltage by varying the on-time of a low-side switch, while holding the on-time of the high-side switch constant. Advantageously, the converter shortens the on-time of the high-side switch during light load conditions, which reduces the output voltage ripple. Thus, the converter may be understood as using a first, constant on-time for the high-side switch during “normal” operations and a second, shorter on-time for the high-side switch during light load conditions.
Public/Granted literature
- US20130033248A1 Methods to Reduce Output Voltage Ripple in Constant On-Time DC-DC Converters Public/Granted day:2013-02-07
Information query
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