Invention Grant
US08773099B2 Methods to reduce output voltage ripple in constant on-time DC-DC converters 有权
降低恒定导通时间DC-DC转换器输出电压纹波的方法

Methods to reduce output voltage ripple in constant on-time DC-DC converters
Abstract:
According to one aspect of the teachings herein, a DC-to-DC converter operates according to an advantageous constant on-time topology that reduces output voltage ripple during light load conditions. The converter produces an output voltage by driving high-side and low-side switches in an inductor-based switching circuit, and regulates the output voltage by varying the on-time of a low-side switch, while holding the on-time of the high-side switch constant. Advantageously, the converter shortens the on-time of the high-side switch during light load conditions, which reduces the output voltage ripple. Thus, the converter may be understood as using a first, constant on-time for the high-side switch during “normal” operations and a second, shorter on-time for the high-side switch during light load conditions.
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