Invention Grant
- Patent Title: Rail to rail differential buffer input stage
- Patent Title (中): 轨到轨差动缓冲器输入级
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Application No.: US13716194Application Date: 2012-12-16
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Publication No.: US08773174B2Publication Date: 2014-07-08
- Inventor: Yang Wang , Jianzhou Wu , Xiuqiang Xu , Yizhong Zhang
- Applicant: Yang Wang , Jianzhou Wu , Xiuqiang Xu , Yizhong Zhang
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Main IPC: H03B1/00
- IPC: H03B1/00 ; H03K3/00

Abstract:
A rail to rail differential buffer input stage includes n-type and p-type input differential transistor pairs connected in voltage follower configuration to the power supply rails. A reference voltage generator includes a reference differential transistor pair generating a dynamic reference voltage relative to the common mode input voltage. Dummy n-type and p-type transistor pairs have current conducting paths connected in parallel with the input differential pairs and are controlled by the dynamic reference voltage to divert supply rail current away from and deactivate one of the associated input differential pairs when the common mode input voltage is further from the dynamic reference voltage than a threshold value. Both the dummy pairs conduct and both the input differential pairs are activated when the common mode input voltage is closer to the dynamic reference voltage VB than the threshold value so that the overall transconductance of the buffer input stage remains constant.
Public/Granted literature
- US20140139267A1 RAIL TO RAIL DIFFERENTIAL BUFFER INPUT STAGE Public/Granted day:2014-05-22
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