Invention Grant
- Patent Title: Locked loop circuits and methods
- Patent Title (中): 锁定回路电路和方法
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Application No.: US13691650Application Date: 2012-11-30
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Publication No.: US08773181B2Publication Date: 2014-07-08
- Inventor: Duncan Mcleod , Farshid Nowshadi , David Chappaz
- Applicant: Cambridge Silicon Radio Limited
- Applicant Address: GB Cambridge
- Assignee: Cambridge Silicon Radio, Ltd.
- Current Assignee: Cambridge Silicon Radio, Ltd.
- Current Assignee Address: GB Cambridge
- Agency: Pillsbury Winthrop Shaw Pittman LLP
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
The present invention provides a locked loop circuit in which the input clock signal is delayed according to a saw-tooth signal in order to output a range of frequencies not necessarily equal to an integer multiple of the input clock signal. The absolute value of the delay (i.e. the difference between the maximum and minimum values of the saw-tooth delay) can be calibrated by detecting the value of the circuit phase detector at the wrap point of the saw-tooth.
Public/Granted literature
- US20140152359A1 LOCKED LOOP CIRCUITS AND METHODS Public/Granted day:2014-06-05
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