Invention Grant
- Patent Title: Systems and methods for block-wise inter-track interference compensation
- Patent Title (中): 用于块式轨道间干扰补偿的系统和方法
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Application No.: US13186213Application Date: 2011-07-19
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Publication No.: US08773794B2Publication Date: 2014-07-08
- Inventor: George Mathew , Jongseung Park , Shaohua Yang , Erich F. Haratsch
- Applicant: George Mathew , Jongseung Park , Shaohua Yang , Erich F. Haratsch
- Applicant Address: US CA San Jose
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA San Jose
- Agency: Hamilton DeSanctis & Cha
- Main IPC: G11B5/09
- IPC: G11B5/09

Abstract:
Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
Public/Granted literature
- US20120063023A1 Systems and Methods for Block-wise Inter-track Interference Compensation Public/Granted day:2012-03-15
Information query
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