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US08773886B2 Memory array with co-planar waveguide based memory element selection 有权
具有共面波导的存储器阵列存储元件选择

Memory array with co-planar waveguide based memory element selection
Abstract:
A memory array with co-planar waveguide based memory selection includes a first set of parallel conductive lines placed perpendicular to a second set of parallel conductive lines, memory elements disposed at intersections between the first set of conductive lines and the second set of conductive lines, and selection circuitry to apply an reading electrical condition to a selected one of the conductive lines and to ground conductive lines adjacent to the selected conductive line to form a co-planar waveguide.
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