Invention Grant
US08775841B2 Circuit configuration having a transceiver circuit for a bus system and nodes for a bus system 有权
具有用于总线系统的收发器电路和用于总线系统的节点的电路配置

Circuit configuration having a transceiver circuit for a bus system and nodes for a bus system
Abstract:
A circuit configuration for a node of a bus system includes a transceiver circuit and a control circuit connected to the transceiver circuit. The transceiver circuit has an idle mode, in which it has a reduced power consumption in comparison with at least one operating mode, and the transceiver circuit is supplied with power in the at least one operating mode via a power supply unit integrated into the transceiver circuit. The control circuit is connected to the power supply unit to supply the control circuit with power in the idle mode, and the circuit configuration has a controllable voltage regulator which is coupled to the transceiver circuit in such a way that the voltage regulator is deactivated in the idle mode to reduce the power consumption and activated in the operating mode to supply power to the transceiver circuit and the control circuit.
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