Methods and structure for correlating multiple sets of test output signals in time are provided. The structure includes an integrated circuit comprising a block of circuitry that generates internal operational signals. The circuit also comprises a test multiplexer (MUX) hierarchy that selects subsets of the internal signals and applies the subsets to a testing element. A clock generator generates a clock signal for the selected signals. A test logic timer receives the clock signal and increments a counter value, and applies the counter value to the testing element. An event detector resets the counter value upon detection of an event, such that a first subset of the internal signals acquired from the test MUX hierarchy acquired responsive to detection of a first instance of the event may be correlated in time with a second subset of the internal signals acquired responsive to detection of a second instance of the event.