Invention Grant
- Patent Title: Vertical type integrated circuit devices and memory devices including conductive lines supported by Mesa structures and methods of fabricating the same
- Patent Title (中): 包括由Mesa结构支撑的导电线的垂直型集成电路器件和存储器件及其制造方法
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Application No.: US12891910Application Date: 2010-09-28
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Publication No.: US08791526B2Publication Date: 2014-07-29
- Inventor: Jae-man Yoon , Hyeong-sun Hong , Kwang-youl Chun , Makoto Yoshida , Deok-sung Hwang , Chul Lee
- Applicant: Jae-man Yoon , Hyeong-sun Hong , Kwang-youl Chun , Makoto Yoshida , Deok-sung Hwang , Chul Lee
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2009-0100765 20091022
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A vertical type integrated circuit device includes a substrate and a pillar vertically protruding from the substrate. The pillar includes a lower impurity region and an upper impurity region therein and a vertical channel region therebetween. A portion of the pillar including the lower impurity region therein includes a mesa laterally extending therefrom. The device further includes a first conductive line extending on a first sidewall of the pillar and electrically contacting the lower impurity region, and a second conductive line extending on a second sidewall of the pillar adjacent the vertical channel region. The second conductive line extends in a direction perpendicular to the first conductive line and is spaced apart from the mesa. Related devices and methods of fabrication are also discussed.
Public/Granted literature
- US20110095350A1 VERTICAL TYPE INTEGRATED CIRCUIT DEVICES, MEMORY DEVICES, AND METHODS OF FABRICATING THE SAME Public/Granted day:2011-04-28
Information query
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