Invention Grant
- Patent Title: Pillar-based interconnects for magnetoresistive random access memory
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Application No.: US12549799Application Date: 2009-08-28
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Publication No.: US08796041B2Publication Date: 2014-08-05
- Inventor: Solomon Assefa , Michael C. Gaidis , Eric A. Joseph , Eugene J. O'Sullivan
- Applicant: Solomon Assefa , Michael C. Gaidis , Eric A. Joseph , Eugene J. O'Sullivan
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Fleit Gibbons Gutman Bongini & Bianco PL
- Agent Thomas Grzesik
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
A semiconductor device includes a substrate including an M2 patterned area. A VA pillar structure is formed over the M2 patterned area. The VA pillar structure includes a substractively patterned metal layer. The VA pillar structure is a sub-lithographic contact. An MTJ stack is formed over the oxide layer and the metal layer of the VA pillar. A size of the MTJ stack and a shape anisotropy of the MTJ stack are independent of a size and a shape anisotropy of the sub-lithographic contact.
Public/Granted literature
- US20110049655A1 PILLAR-BASED INTERCONNECTS FOR MAGNETORESISTIVE RANDOM ACCESS MEMORY Public/Granted day:2011-03-03
Information query
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