Invention Grant
- Patent Title: Semiconductor memory device
- Patent Title (中): 半导体存储器件
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Application No.: US14033918Application Date: 2013-09-23
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Publication No.: US08796663B2Publication Date: 2014-08-05
- Inventor: Nobuaki Yasutake
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2010-277962 20101214
- Main IPC: H01L47/00
- IPC: H01L47/00

Abstract:
A memory cell comprises a diode layer, a variable resistance layer, a first electrode layer. The diode layer functions as a rectifier element. The variable resistance layer functions as a variable resistance element. The first electrode layer is provided between the variable resistance layer and the diode layer. The first electrode layer comprises a titanium nitride layer configured by titanium nitride. Where a first ratio is defined as a ratio of titanium atoms to nitrogen atoms in a first region in the titanium nitride layer and a second ratio is defined as a ratio of titanium atoms to nitrogen atoms in a second region which is in the titanium nitride layer and is nearer to the variable resistance layer than is the first region, the second ratio is larger than the first ratio.
Public/Granted literature
- US20140021436A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2014-01-23
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