Invention Grant
- Patent Title: Method for manufacturing a semiconductor device
- Patent Title (中): 半导体器件的制造方法
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Application No.: US13666153Application Date: 2012-11-01
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Publication No.: US08796682B2Publication Date: 2014-08-05
- Inventor: Shinya Sasagawa , Motomu Kurata , Hideaki Kuwabara , Mari Terashima
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-si, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-si, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP2011-247936 20111111
- Main IPC: H01L29/12
- IPC: H01L29/12

Abstract:
To provide a highly reliable semiconductor device including a transistor using an oxide semiconductor. After a source electrode layer and a drain electrode layer are formed, an island-like oxide semiconductor layer is formed in a gap between these electrode layers so that a side surface of the oxide semiconductor layer is covered with a wiring, whereby light is prevented from entering the oxide semiconductor layer through the side surface. Further, a gate electrode layer is formed over the oxide semiconductor layer with a gate insulating layer interposed therebetween and impurities are introduced with the gate electrode layer used as a mask. Then, a conductive layer is provided on a side surface of the gate electrode layer in the channel length direction, whereby an Lov region is formed while maintaining a scaled-down channel length and entry of light from above into the oxide semiconductor layer is prevented.
Public/Granted literature
- US20130119376A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2013-05-16
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