Invention Grant
- Patent Title: Multi level programmable memory structure with multiple charge storage structures and fabricating method thereof
- Patent Title (中): 具有多个电荷存储结构的多级可编程存储器结构及其制造方法
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Application No.: US13166144Application Date: 2011-06-22
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Publication No.: US08796754B2Publication Date: 2014-08-05
- Inventor: Cheng-Hsien Cheng , Wen-Jer Tsai , Shih-Guei Yan , Chih-Chieh Cheng , Jyun-Siang Huang
- Applicant: Cheng-Hsien Cheng , Wen-Jer Tsai , Shih-Guei Yan , Chih-Chieh Cheng , Jyun-Siang Huang
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX International Co., Ltd.
- Current Assignee: MACRONIX International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L21/336 ; H01L27/115 ; H01L29/788

Abstract:
A memory structure including a memory cell is provided, and the memory cell includes following elements. A first gate is disposed on a substrate. A stacked structure includes a first dielectric structure, a channel layer, a second dielectric structure and a second gate disposed on the first gate, a first charge storage structure disposed in the first dielectric structure and a second charge storage structure disposed in the second dielectric structure. At least one of the first charge storage structure and the second charge storage structure includes two charge storage units which are physically separated. A first dielectric layer is disposed on the first gate at two sides of the stacked structure. A first source and drain and a second source and drain are disposed on the first dielectric layer and located at two sides of the channel layer.
Public/Granted literature
- US20120326222A1 MEMORY STRUCTURE AND FABRICATING METHOD THEREOF Public/Granted day:2012-12-27
Information query
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