Disclosed herein is a device that comprises a delay line delaying a first clock signal in response to the delay control information to produce a delayed clock signal, a phase detector unit controls the delay control information in response to a relationship in phase between the first clock signal and a second clock signal, and an inverting control unit receiving the delayed clock signal and producing a third clock signal, the second clock signal being produced in response to the third clock signal. The third clock signal is in phase with the delayed clock signal when the inverting control unit is in a first state and complementary to the delayed clock signal when the inverting control unit is in a second state.