Invention Grant
- Patent Title: Circuits, apparatuses, and methods for delay models
- Patent Title (中): 延迟模型的电路,装置和方法
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Application No.: US13619859Application Date: 2012-09-14
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Publication No.: US08797080B2Publication Date: 2014-08-05
- Inventor: Venkatraghavan Bringivijayaraghavan , Jason Brown , Tyler J. Gomm
- Applicant: Venkatraghavan Bringivijayaraghavan , Jason Brown , Tyler J. Gomm
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: H03H11/26
- IPC: H03H11/26

Abstract:
Circuits, apparatuses, and methods are disclosed for delay models. In one such example circuit, a first delay model circuit is configured to provide a first output signal by modeling a delay of a signal through a path. A second delay model circuit is configured to provide a second output signal by modeling the delay of the signal through the path. A compare circuit is coupled to the first and second delay model circuits. The compare circuit is configured to compare a third signal from the first delay model circuit and a fourth signal from the second delay model circuit, and, in response provide an adjustment signal to adjust the delay of the second delay model circuit.
Public/Granted literature
- US20140077851A1 CIRCUITS, APPARATUSES, AND METHODS FOR DELAY MODELS Public/Granted day:2014-03-20
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