One embodiment includes a phase-based analog-to-digital converter (ADC) system. The system includes a voltage-to-phase converter configured to convert an input voltage to a phase difference corresponding to a phase-delay with respect to an input clock signal that is based on a magnitude of the input voltage. The system also includes a phase-to-digital converter configured to convert the phase difference into a digital output signal having a digital value corresponding to a magnitude of the phase difference.