Invention Grant
US08797701B2 Electronic load for testing voltage stability 有权
用于测试电压稳定性的电子负载

Electronic load for testing voltage stability
Abstract:
An electronic load for testing stability of a power voltage of a power source under test (PSUT) includes a voltage supply device, a field effect transistor (FET), an amplification circuit, and a current sampling resistor. The amplification circuit includes a first input, a second input, and an output. The voltage supply device is connected to the first input. The second input is connected to a source electrode of the FET. The output is connected to a gate electrode of the FET. A drain electrode of the FET is connected to the PSUT. One end of the current sampling resistor is grounded, and the other end of the current sampling resistor is connected to the source electrode of the FET and the second input. The voltage supply device outputs a control voltage. The amplification circuit amplifies the control voltage and drives the FET using the amplified control voltage.
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