Invention Grant
- Patent Title: Wiring substrate and manufacturing method thereof
- Patent Title (中): 接线基板及其制造方法
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Application No.: US13344864Application Date: 2012-01-06
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Publication No.: US08797757B2Publication Date: 2014-08-05
- Inventor: Kentaro Kaneko , Toshiaki Aoki , Kazuhiro Kobayashi , Kotaro Kodani , Junichi Nakamura
- Applicant: Kentaro Kaneko , Toshiaki Aoki , Kazuhiro Kobayashi , Kotaro Kodani , Junichi Nakamura
- Applicant Address: JP Nagano
- Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee Address: JP Nagano
- Agency: IPUSA, PLLC
- Priority: JP2011-003423 20110111
- Main IPC: H05K7/12
- IPC: H05K7/12 ; H05K1/11 ; H05K1/16

Abstract:
A wiring substrate includes plural insulating layers including an outermost insulating layer; and plural wiring layers which are alternately laminated between the insulating layers and include outermost wiring layers exposed from the outermost insulating layer and through wirings having electrode pads on end portions of the through wirings and penetrating through the outermost insulating layer, wherein the electrode pads of the through wirings are exposed from the outermost insulating layer, and a part of the outermost wiring layers overlaps the end portions of the through wirings and is connected to the through wirings.
Public/Granted literature
- US08760883B2 Wiring substrate and manufacturing method thereof Public/Granted day:2014-06-24
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