Invention Grant
- Patent Title: Semiconductor memory and semiconductor memory control method
- Patent Title (中): 半导体存储器和半导体存储器控制方法
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Application No.: US13432708Application Date: 2012-03-28
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Publication No.: US08797807B2Publication Date: 2014-08-05
- Inventor: Masahiro Yoshihara , Katsumi Abe
- Applicant: Masahiro Yoshihara , Katsumi Abe
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-076285 20110330
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C16/10 ; G11C16/26
Abstract:
According to one embodiment, the semiconductor memory includes a memory cell array which includes memory cells to store data, a buffer circuit which includes latches, each of the latches including transistors as control elements and a flip-flop, and a control circuit which turns off the transistors to deactivate one or more of the latches.
Public/Granted literature
- US20120250425A1 SEMICONDUCTOR MEMORY AND SEMICONDUCTOR MEMORY CONTROL METHOD Public/Granted day:2012-10-04
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