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US08797814B2 Multi-test apparatus and method for testing a plurailty of semiconductor chips 有权
用于测试半导体芯片的多重测试装置和方法

Multi-test apparatus and method for testing a plurailty of semiconductor chips
Abstract:
An apparatus and method is capable of reducing instantaneously consumed current by allowing write drivers and input buffers not to be simultaneously driven in a multi-test of semiconductor chips. A multi-test apparatus includes an input unit configured to receive data for testing, wherein the data for testing is inputted from a circuit outside of the multi-test apparatus, a plurality of memory banks each including a plurality of memory cells, a plurality of write drivers, corresponding to the respective memory banks, configured to write the test data in the plurality of memory banks, and a write control unit configured to control the plurality of write drivers so that the test data is written in the memory banks in at least two time periods.
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