Invention Grant
US08797814B2 Multi-test apparatus and method for testing a plurailty of semiconductor chips
有权
用于测试半导体芯片的多重测试装置和方法
- Patent Title: Multi-test apparatus and method for testing a plurailty of semiconductor chips
- Patent Title (中): 用于测试半导体芯片的多重测试装置和方法
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Application No.: US13333487Application Date: 2011-12-21
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Publication No.: US08797814B2Publication Date: 2014-08-05
- Inventor: Dae-Suk Kim
- Applicant: Dae-Suk Kim
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2011-0039074 20110426
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C29/00

Abstract:
An apparatus and method is capable of reducing instantaneously consumed current by allowing write drivers and input buffers not to be simultaneously driven in a multi-test of semiconductor chips. A multi-test apparatus includes an input unit configured to receive data for testing, wherein the data for testing is inputted from a circuit outside of the multi-test apparatus, a plurality of memory banks each including a plurality of memory cells, a plurality of write drivers, corresponding to the respective memory banks, configured to write the test data in the plurality of memory banks, and a write control unit configured to control the plurality of write drivers so that the test data is written in the memory banks in at least two time periods.
Public/Granted literature
- US20120275246A1 MULTI-TEST APPARATUS AND METHOD FOR SEMICONDUCTOR CHIPS Public/Granted day:2012-11-01
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