Invention Grant
- Patent Title: Current mode logic circuit and method
- Patent Title (中): 电流模式逻辑电路及方法
-
Application No.: US13588830Application Date: 2012-08-17
-
Publication No.: US08803611B2Publication Date: 2014-08-12
- Inventor: Wei Chih Chen
- Applicant: Wei Chih Chen
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater and Matsil, L.L.P.
- Main IPC: H03F3/45
- IPC: H03F3/45

Abstract:
A circuit includes a bias generating circuit, an operational amplifier, and a current mode logic circuit. The operational amplifier has a first input terminal, a second input terminal, and an output terminal. The bias generating circuit is configured to provide a first bias voltage to the first terminal. The second terminal is configured to receive a second bias voltage. The second terminal and the output terminal are configured to form a negative feedback loop. The output terminal is coupled with the current mode logic circuit.
Public/Granted literature
- US20140028394A1 CURRENT MODE LOGIC CIRCUIT AND METHOD Public/Granted day:2014-01-30
Information query