Invention Grant
US08804450B2 Memory circuits having a diode-connected transistor with back-biased control
有权
存储器电路具有带反向偏置控制的二极管连接晶体管
- Patent Title: Memory circuits having a diode-connected transistor with back-biased control
- Patent Title (中): 存储器电路具有带反向偏置控制的二极管连接晶体管
-
Application No.: US13790726Application Date: 2013-03-08
-
Publication No.: US08804450B2Publication Date: 2014-08-12
- Inventor: Steven Swei , David B. Scott
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW
- Agency: Lowe Hauptman & Ham, LLP
- Main IPC: G11C5/14
- IPC: G11C5/14
Abstract:
A memory circuit including at least one memory array and at least one sleep transistor connected to the at least one memory array and connected to a first power line for providing a first power voltage. The memory circuit further includes at least one diode-connected transistor directly connected to the at least one memory array and directly connected to the first power line and a back-bias circuit electrically coupled with a bulk of the at least one diode-connected transistor.
Public/Granted literature
- US20130188416A1 MEMORY CIRCUITS HAVING A DIODE-CONNECTED TRANSISTOR WITH BACK-BIASED CONTROL Public/Granted day:2013-07-25
Information query
