Invention Grant
- Patent Title: Symbol timing recovery circuit
- Patent Title (中): 符号定时恢复电路
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Application No.: US13533673Application Date: 2012-06-26
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Publication No.: US08804806B2Publication Date: 2014-08-12
- Inventor: Tatsuaki Kitta
- Applicant: Tatsuaki Kitta
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Arent Fox LLP
- Priority: JP2011-171056 20110804
- Main IPC: H03H7/30
- IPC: H03H7/30 ; H03H7/40 ; H03K5/159

Abstract:
Disclosed is a symbol timing recovery circuit which includes an interpolator to generate, using a first filter, interpolation data of an input signal; a forward equalizer to eliminate, using a second filter, a forward interference wave from the input signal based on the interpolation data, and to output the resultant signal after the elimination, a first identification signal, and a first error signal; a backward equalizer to eliminate, using a third filter, a backward interference wave from the input signal based on the interpolation data, and to output the resultant signal after the elimination, a second identification signal, and a second error signal; and a timing recovery unit to generate a tap coefficient of the first filter, based on a tap coefficient of the second filter, a tap coefficient of the third filter, the first identification signal, the first error signal, the second identification signal, and the second error signal.
Public/Granted literature
- US20130034142A1 SYMBOL TIMING RECOVERY CIRCUIT Public/Granted day:2013-02-07
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