Invention Grant
- Patent Title: Receiver with dual clock recovery circuits
- Patent Title (中): 具有双时钟恢复电路的接收器
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Application No.: US13738185Application Date: 2013-01-10
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Publication No.: US08804889B2Publication Date: 2014-08-12
- Inventor: Chaitanya Palusa , Tomasz Prokop
- Applicant: LSI Corporation
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Main IPC: H04L7/00
- IPC: H04L7/00 ; H04L27/38 ; H04L27/06 ; H03D3/24
Abstract:
A receiver derives the desired data sampling clock phase by averaging the phase information of transitions before and after a data eye. The average of the phase information reduces data clock phase error due to variations in the phases of transitions in received data signals depending on the polarity and positions of the transitions.
Public/Granted literature
- US20140192935A1 RECEIVER WITH DUAL CLOCK RECOVERY CIRCUITS Public/Granted day:2014-07-10
Information query
