Invention Grant
- Patent Title: Method for forming fine patterns of semiconductor device
- Patent Title (中): 用于形成半导体器件精细图案的方法
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Application No.: US13895093Application Date: 2013-05-15
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Publication No.: US08808971B2Publication Date: 2014-08-19
- Inventor: Jae Seung Choi
- Applicant: Hynix Semiconductor Inc.
- Applicant Address: KR Icheon-Si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-Si
- Agency: Marshall, Gerstein & Borun LLP
- Priority: KR10-2008-057870 20080619
- Main IPC: G03F7/20
- IPC: G03F7/20 ; H01L21/311 ; G03F7/095 ; G03F7/00 ; H01L21/033 ; H01L27/108
Abstract:
A method for forming fine patterns of a semiconductor device employs a double patterning characteristic using a mask for forming a first pattern including a line pattern and a mask for separating the line pattern, and a reflow characteristic of a photoresist pattern.
Public/Granted literature
- US20130252174A1 Method for Forming Fine Patterns of Semiconductor Device Public/Granted day:2013-09-26
Information query
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