Invention Grant
- Patent Title: Apparatus and methods for de-embedding through substrate vias
- Patent Title (中): 用于通过衬底通孔去嵌入的装置和方法
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Application No.: US13197602Application Date: 2011-08-03
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Publication No.: US08809073B2Publication Date: 2014-08-19
- Inventor: Hsiao-Tsung Yen , Yu-Ling Lin , Chin-Wei Kuo , Victor Chih Yuan Chang , Min-Chie Jeng
- Applicant: Hsiao-Tsung Yen , Yu-Ling Lin , Chin-Wei Kuo , Victor Chih Yuan Chang , Min-Chie Jeng
- Applicant Address: JP Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: JP Hsin-Chu
- Agency: Slater and Matsil, L.L.P.
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G01R31/26

Abstract:
A method includes providing on a substrate having at least two through substrate vias (“TSVs”) a plurality of test structures for de-embedding the measurement of the intrinsic characteristics of a device under test (DUT) including at least two of the TSVs; measuring the intrinsic characteristics [L] for a first and a second test structure on the substrate including two pads coupled with a transmission line of length L; using simultaneous solutions of ABCD matrix or T matrix form equations, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the pads and the transmission lines; de-embedding the measurements of the third and fourth test structures using the intrinsic characteristics of the pads and the transmission lines; and using simultaneous solutions of ABCD matrix or T matrix form equations for BM_L and BM_LX, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the TSVs.
Public/Granted literature
- US20130032799A1 Apparatus and Methods for De-Embedding Through Substrate Vias Public/Granted day:2013-02-07
Information query
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