Invention Grant
- Patent Title: Fabrication of MOS device with schottky barrier controlling layer
- Patent Title (中): 用肖特基势垒控制层制造MOS器件
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Application No.: US13725789Application Date: 2012-12-21
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Publication No.: US08809143B2Publication Date: 2014-08-19
- Inventor: Anup Bhalla , Xiaobin Wang , Ji Pan , Sung-Po Wei
- Applicant: Alpha & Omega Semiconductor Limited
- Applicant Address: BM
- Assignee: Alpha & Omega Semiconductor Limited
- Current Assignee: Alpha & Omega Semiconductor Limited
- Current Assignee Address: BM
- Agency: Van Pelt, Yi & James LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234

Abstract:
Fabricating a semiconductor device includes: forming a gate trench in an epitaxial layer overlaying a semiconductor substrate; depositing gate material in the gate trench; forming a body; forming a source; forming an active region contact trench that extends through the source and the body into the drain; forming a Schottky barrier controlling layer in the epitaxial layer in bottom region of the active region contact trench; and disposing a contact electrode within the active region contact trench.
Public/Granted literature
- US20130203225A1 FABRICATION OF MOS DEVICE WITH SCHOTTKY BARRIER CONTROLLING LAYER Public/Granted day:2013-08-08
Information query
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