Invention Grant
US08809171B2 Methods for forming FinFETs having multiple threshold voltages
有权
用于形成具有多个阈值电压的FinFET的方法
- Patent Title: Methods for forming FinFETs having multiple threshold voltages
- Patent Title (中): 用于形成具有多个阈值电压的FinFET的方法
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Application No.: US13748419Application Date: 2013-01-23
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Publication No.: US08809171B2Publication Date: 2014-08-19
- Inventor: Jeffrey Junhao Xu , Ying Zhang , Ziwei Fang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater and Matsil, L.L.P.
- Main IPC: H01L21/425
- IPC: H01L21/425

Abstract:
A method includes forming a first and a second gate stack to cover a first and a second middle portion of a first and a second semiconductor fin, respectively, and performing implantations to implant exposed portions of the first and the second semiconductor fins to form a first and a second n-type doped region, respectively. A portion of each of the first and the second middle portions is protected from the implantations. The first n-type doped region and the second n-type doped region have different gate proximities from edges of the first gate stack and the second stack, respectively. The first and the second n-type doped regions are etched using chlorine radicals to form a first and a second recess, respectively. An epitaxy is performed to re-grow a first semiconductor region and a second semiconductor region in the first recess and the second recess, respectively.
Public/Granted literature
- US20140187013A1 Methods for Forming FinFETs Having Multiple Threshold Voltages Public/Granted day:2014-07-03
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