Invention Grant
- Patent Title: Semiconductor device having angled trench walls
- Patent Title (中): 半导体器件具有成角度的沟槽壁
-
Application No.: US13679543Application Date: 2012-11-16
-
Publication No.: US08809945B2Publication Date: 2014-08-19
- Inventor: Keiji Wada , Takeyoshi Masuda , Toru Hiyoshi
- Applicant: Sumitomo Electric Industries, Ltd.
- Applicant Address: JP Osaka-shi
- Assignee: Sumitomo Electric Industries, Ltd.
- Current Assignee: Sumitomo Electric Industries, Ltd.
- Current Assignee Address: JP Osaka-shi
- Agency: Venable LLP
- Agent Michael A. Sartori
- Priority: JP2011-255732 20111124
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119 ; H01L29/24 ; H01L29/66 ; H01L29/78 ; H01L29/423 ; H01L29/04 ; H01L29/16

Abstract:
A MOSFET includes: a substrate provided with a trench having a side wall surface having an off angle of not less than 50° and not more than 65° relative to a {0001} plane; an oxide film; and a gate electrode. The substrate includes a source region, a body region, and a drift region formed to sandwich the body region between the source region and the drift region. The source region and the body region are formed by means of ion implantation. The body region has an internal region sandwiched between the source region and the drift region and having a thickness of 1 μm or smaller in a direction perpendicular to a main surface thereof. The body region has an impurity concentration of 3×1017 cm−3 or greater.
Public/Granted literature
- US20130134442A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2013-05-30
Information query
IPC分类: