Invention Grant
- Patent Title: Method of adjusting the threshold voltage of a transistor by a buried trapping layer
- Patent Title (中): 通过埋置捕获层调节晶体管的阈值电压的方法
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Application No.: US12865549Application Date: 2009-02-11
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Publication No.: US08809964B2Publication Date: 2014-08-19
- Inventor: François Andrieu , Emmanuel Augendre , Laurent Clavelier , Marek Kostrzewa
- Applicant: François Andrieu , Emmanuel Augendre , Laurent Clavelier , Marek Kostrzewa
- Applicant Address: FR Paris
- Assignee: Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Current Assignee: Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Current Assignee Address: FR Paris
- Agency: Brinks Gilson & Lione
- Priority: FR0851073 20080219
- International Application: PCT/FR2009/050212 WO 20090211
- International Announcement: WO2009/103921 WO 20090827
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/792

Abstract:
An electronic subassembly and associated method for the production of an electronic subassembly include a semiconductor layer bearing at least a first transistor having an adjustable threshold voltage is joined to an insulator layer and in which a first trapping zone is formed at a predetermined first depth. The first trapping zone extends at least beneath a channel of the first transistor and includes traps of greater density than the density of traps outside the first trapping zone, in such a way that the semiconductor layer and the first trapping zone are capacitively coupled. The useful information from the first transistor includes the charge transport within this transistor. A second trapping zone can be formed that extends at least beneath a channel of a second transistor that is formed by a second implantation with an energy and/or a dose and/or atoms that differ from those used to form the first trapping zone.
Public/Granted literature
- US20110001184A1 METHOD OF ADJUSTING THE THRESHOLD VOLTAGE OF A TRANSISTOR BY A BURIED TRAPPING LAYER Public/Granted day:2011-01-06
Information query
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