Invention Grant
- Patent Title: Solder joint flip chip interconnection
- Patent Title (中): 焊接倒装芯片互连
-
Application No.: US13367214Application Date: 2012-02-06
-
Publication No.: US08810029B2Publication Date: 2014-08-19
- Inventor: Rajendra D. Pendse , KyungOe Kim , TaeWoo Kang
- Applicant: Rajendra D. Pendse , KyungOe Kim , TaeWoo Kang
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/44

Abstract:
A flip chip interconnect has a tapering interconnect structure, and the area of contact of the interconnect structure with the site on the substrate metallization is less than the area of contact of the interconnect structure with the die pad. Also, a bond-on-lead or bond-on-narrow pad or bond on a small area of a contact pad interconnection includes such tapering flip chip interconnects. Also, methods for making the interconnect structure include providing a die having interconnect pads, providing a substrate having interconnect sites on a patterned conductive layer, providing a bump on a die pad, providing a fusible electrically conductive material either at the interconnect site or on the bump, mating the bump to the interconnect site, and heating to melt the fusible material.
Public/Granted literature
- US20120133043A1 Solder Joint Flip Chip Interconnection Public/Granted day:2012-05-31
Information query
IPC分类: