Invention Grant
- Patent Title: Wafer-to-wafer stack with supporting pedestal
- Patent Title (中): 具有支撑底座的晶圆到晶片叠层
-
Application No.: US12982046Application Date: 2010-12-30
-
Publication No.: US08810031B2Publication Date: 2014-08-19
- Inventor: Chi-Shih Chang , Ra-Min Tain , Shyi-Ching Liau , Wei-Chung Lo , Rong-Shen Lee
- Applicant: Chi-Shih Chang , Ra-Min Tain , Shyi-Ching Liau , Wei-Chung Lo , Rong-Shen Lee
- Applicant Address: TW Hsinchu
- Assignee: Industrial Technology Research Institute
- Current Assignee: Industrial Technology Research Institute
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Priority: TW94137522A 20051026
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
An electronic device having a stacked structure is provided. The electronic device includes a first electronic layer, a second electronic layer disposed on the first electronic layer, and at least a post. The first electronic layer has a first interface, and including a first substrate and a first device layer disposed on the first substrate. The first interface is located between the first substrate and the first device layer, and the first device layer has a surface opposite to the first interface. The post is arranged in the first device layer, and extending from the first interface to the surface of the first device layer.
Public/Granted literature
- US20110156249A1 WAFER-TO-WAFER STACK WITH SUPPORTING PEDESTAL Public/Granted day:2011-06-30
Information query
IPC分类: