A phase adjuster 2a receives a trigger clock synchronized with a data signal to be measured as input, and controls the phase of the trigger clock such that the trigger period of samples of the data signal to be measured becomes one sample per bit. An adjustable frequency divider 2b has a frequency division ratio which is set such that a trigger pulse is generated at the fixed timing of the waveform pattern of the data signal to be measured. An interleaving unit 4d uses a discrete value which is in prime relation to the measured pattern length of the data signal to be measured, and acquires data for the number of samples corresponding to the measured pattern length from a sampler 3 by the trigger pulse from the adjustable frequency divider 2b.