Invention Grant
- Patent Title: Automatically modifying a circuit layout to perform electromagnetic simulation
- Patent Title (中): 自动修改电路布局进行电磁仿真
-
Application No.: US13740195Application Date: 2013-01-12
-
Publication No.: US08813020B2Publication Date: 2014-08-19
- Inventor: Joseph Edward Pekarek , Niranjana Sharma Doddamani
- Applicant: AWR Corporation
- Applicant Address: US CA El Segundo
- Assignee: AWR Corporation
- Current Assignee: AWR Corporation
- Current Assignee Address: US CA El Segundo
- Agency: Meyertons Hood Kivlin Kowert & Goetzel, P.C.
- Agent Jeffrey C. Hood
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A system and method for automatically modifying a first layout of a circuit. The first layout may describe a plurality of layers used in a fabrication process to manufacture the circuit. When performed, the fabrication process may result in a vertical electrical connection between two of the layers. However, the vertical electrical connection may not be directly specified by the first layout. The system and method may operate to apply a set of rules to the first layout to automatically generate a modified layout directly specifying a vertical electrical connection between the two layers. The set of rules may be based on knowledge of the fabrication process, and may be designed to modify the geometry of the first layout to more closely model the real geometry of the circuit that will result from the fabrication process. The modified layout may enable an electromagnetic (EM) simulation of the circuit to be accurately performed.
Public/Granted literature
- US20130191802A1 Automatically Modifying a Circuit Layout to Perform Electromagnetic Simulation Public/Granted day:2013-07-25
Information query