Invention Grant
- Patent Title: Method for manufacturing SOI substrate and semiconductor device
- Patent Title (中): 制造SOI衬底和半导体器件的方法
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Application No.: US12949283Application Date: 2010-11-18
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Publication No.: US08815662B2Publication Date: 2014-08-26
- Inventor: Kosei Noda , Toshihiko Takeuchi , Makoto Ishikawa
- Applicant: Kosei Noda , Toshihiko Takeuchi , Makoto Ishikawa
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP2009-266150 20091124; JP2009-266151 20091124; JP2009-266152 20091124
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
An amorphous semiconductor layer is formed over a first single crystal semiconductor layer provided over a glass substrate or a plastic substrate with an insulating layer therebetween. The amorphous semiconductor layer is formed by a CVD method at a deposition temperature of higher than or equal to 100° C. and lower than or equal to 275° C. with use of a silane-based gas not diluted. Heat treatment is performed so that the amorphous semiconductor layer solid-phase epitaxially grows. In such a manner, an SOI substrate including a thick single crystal semiconductor layer is manufactured.
Public/Granted literature
- US20110124164A1 METHOD FOR MANUFACTURING SOI SUBSTRATE AND SEMICONDUCTOR DEVICE Public/Granted day:2011-05-26
Information query
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