Invention Grant
US08815713B2 Reducing pattern loading effect in epitaxy 有权
降低外延图案加载效应

Reducing pattern loading effect in epitaxy
Abstract:
A method includes forming a gate stack over a semiconductor substrate, forming an opening in the semiconductor substrate and adjacent to the gate stack, and performing a first epitaxy to grow a first semiconductor layer in the first opening. An etch-back is performed to reduce a thickness of the first semiconductor layer. A second epitaxy is performed to grow a second semiconductor layer over the first semiconductor layer. The first and the second semiconductor layers have different compositions.
Public/Granted literature
Information query
Patent Agency Ranking
0/0