Invention Grant
- Patent Title: Semiconductor device and method of fabricating the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US13945440Application Date: 2013-07-18
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Publication No.: US08816347B2Publication Date: 2014-08-26
- Inventor: Shunpei Yamazaki , Jun Koyama
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP10-361535 19981218
- Main IPC: H01L29/04
- IPC: H01L29/04
Abstract:
The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring resistance. One of the features of the present invention is that an LDD region including a region which overlaps with a gate electrode and a region which does not overlap with the gate electrode is provided in one TFT. Another feature of the present invention is that gate electrode comprises a first conductive layer and a second conductive layer and portion of the gate wiring has a clad structure comprising the first conductive layer and the second conductive layer with a low resistance layer interposed therebetween.
Public/Granted literature
- US20130299832A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Public/Granted day:2013-11-14
Information query
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