- Patent Title: System and methods for converting planar design to FinFET design
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Application No.: US13416862Application Date: 2012-03-09
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Publication No.: US08816444B2Publication Date: 2014-08-26
- Inventor: Clement Hsingjen Wann , Chih-Sheng Chang , Yi-Tang Lin , Ming-Feng Shieh , Ting-Chu Ko , Chung-Hsien Chen
- Applicant: Clement Hsingjen Wann , Chih-Sheng Chang , Yi-Tang Lin , Ming-Feng Shieh , Ting-Chu Ko , Chung-Hsien Chen
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW
- Agency: Lowe Hauptman & Ham, LLP
- Main IPC: H01L27/088
- IPC: H01L27/088
Abstract:
A method for generating a layout for a device having FinFETs from a first layout for a device having planar transistors is disclosed. The planar layout is analyzed and corresponding FinFET structures are generated in a matching fashion. The resulting FinFET structures are then optimized. Dummy patterns and a new metal layer may be generated before the FinFET layout is verified and outputted.
Public/Granted literature
- US20120273899A1 SYSTEM AND METHODS FOR CONVERTING PLANAR DESIGN TO FINFET DESIGN Public/Granted day:2012-11-01
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