Invention Grant
- Patent Title: Integrated circuit structures, semiconductor structures, and semiconductor die
- Patent Title (中): 集成电路结构，半导体结构和半导体管芯
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Application No.: US13471048Application Date: 2012-05-14
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Publication No.: US08816489B2Publication Date: 2014-08-26
- Inventor: Gurtej S. Sandhu , Krishna K. Parat
- Applicant: Gurtej S. Sandhu , Krishna K. Parat
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John, P.S.
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L21/30
Abstract:
Methods for fabricating integrated circuit devices on an acceptor substrate devoid of circuitry are disclosed. Integrated circuit devices are formed by sequentially disposing one or more levels of semiconductor material on an acceptor substrate, and fabricating circuitry on each level of semiconductor material before disposition of a next-higher level. After encapsulation of the circuitry, the acceptor substrate is removed and semiconductor dice are singulated. Integrated circuit devices formed by the methods are also disclosed.
Public/Granted literature
- US20120223409A1 Integrated circuit structures, semiconductor structures, and semiconductor die Public/Granted day:2012-09-06
Information query
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