Invention Grant
- Patent Title: Pillar design for conductive bump
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Application No.: US13189127Application Date: 2011-07-22
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Publication No.: US08816498B2Publication Date: 2014-08-26
- Inventor: Cheng-Chieh Hsieh , Cheng-Lin Huang , Po-Hao Tsai , Shang-Yun Hou , Jing-Cheng Lin , Shin-Puu Jeng
- Applicant: Cheng-Chieh Hsieh , Cheng-Lin Huang , Po-Hao Tsai , Shang-Yun Hou , Jing-Cheng Lin , Shin-Puu Jeng
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L23/485
- IPC: H01L23/485 ; H01L21/768
Abstract:
A system and method for conductive pillars is provided. An embodiment comprises a conductive pillar having trenches located around its outer edge. The trenches are used to channel conductive material such as solder when a conductive bump is formed onto the conductive pillar. The conductive pillar may then be electrically connected to another contact through the conductive material.
Public/Granted literature
- US20130020698A1 Pillar Design for Conductive Bump Public/Granted day:2013-01-24
Information query
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